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Title: RBBS/BYE and CP/M
All:
Although I have more testing to do, I believe that I’ve solved the problem. BYE and RBBS now work after I looked into Max’s suggestion about the combined CP/M and CBIOS, which also revealed an error introduced when we patched CP/M for the user-area prompt. Be sure to verify that CCP, BDOS and the CBIOS origination addresses match or otherwise reconcile to what is expected for the related MSIZE as specified in the modification guide or the “Programmer’s
CP/M Handbook”. When the user-prompt compilation switch is used, you need to add 3 to the related offsets in order for the addresses to line-up properly:
0046 0000 ;*****************************************************************
0047 0000 ; “BIAS” IS ADDRESS OFFSET FROM 3400H FOR MEMORY SYSTEMS
0048 0000 ; GREATER THAN 16K.
0049 0000 ; ONLY VALID FOR CP/M 2.2 SYSTEMS
0050 0000 BIAS .EQU (MSIZE-20)*1024 0A000H
0051 0000 CCP .EQU 3400h+BIAS ; CCP ENTRY POINT 0D400H
0052 0000~ .IF CONDUSRPATCH ; budget for extra 3 bytes for JP
0053 0000~ BDOS .EQU CCP+800h+6 ; BDOS ENTRY POINT 0DC06H
0054 0000~ CBIOS .EQU CCP+1600h ; CBIOS jump table 0EA00H
0055 0000 .ELSE
0056 0000 BDOS .EQU CCP+800h+9 ; BDOS ENTRY POINT 0DC09H
0057 0000 CBIOS .EQU CCP+1600h+3 ; CBIOS jump table 0EA03H
0058 0000 .ENDIF
0059 0000 ;*****************************************************************
The “800h+6” is normal per the code in the alteration guide. Notice the “else” clause where the offsets are three bytes greater — that accounts for the “JP AAAA” for the prompt patch.
I remembered from my IMSAI that MBASIC relied on the CBIOS jump table being just that — a table of jumps — and nothing else. The current N8VEM table had a minor short cut relating to the punch, reader, and list devices. I corrected these so that the table is a true jump table.
Second, I made each entry an internal jump. For example (only first two shown) and modified any loop routines so that they didn’t loop to the jump table and back.
3922 EA03 ;**************************************************************
3923 EA03 ;*
3924 EA03 ;* B I O S J U M P T A B L E
3925 EA03 ;*
3926 EA03 ;**************************************************************
3927 EA03 ;
3928 EA03 ; JUMP VECTOR FOR INDIVIDUAL SUBROUTINES - these must be
3929 EA03 ; JMP/JP instructions and nothing else.
3930 EA03 ;
3931 EA03 C3 F0 EA BOOT: JP IBOOT ; COLD START
3932 EA06 C3 0B EB WBOOT: JP IWBOOT ; WARM START
Note that the address of EA03 matches the math in the “CBIOS” equate above. All of the routines in the CBIOS are now “I” plus something to indicate that they are “internal” routines. The location reference name is the “real” name expected by CP/M.
For completeness, here is the BDOS entry showing the matching entry address:
1319 DC03 ; NOTE THAT THE FOLLOWING SIX BYTES MUST MATCH THOSE AT
1320 DC03 ; (PATTRN1) OR CP/M WILL HALT. WHY?
1321 DC03 ;
1322 DC03 001600000000PATTRN2:.DB 0,22,0,0,0,0 ; (* SERIAL NUMBER BYTES *).
1323 DC09 ;
1324 DC09 ;**************************************************************
1325 DC09 ;*
1326 DC09 ;* B D O S E N T R Y
1327 DC09 ;*
1328 DC09 ;**************************************************************
1329 DC09 ;
1330 DC09 C3 14 DC FBASE: JP FBASE1
I have to pull together a web page about this but I think that these changes will reduce future compatibility problems and make the ROM distribution closer to standard CP/M.
The only RBBS problem I have to trace down is an anomaly with the menus.
Rich
–
Rich Cini
Collector of Classic Computers
Build Master and lead engineer, Altair32 Emulator
http://www.altair32.com
http://www.classiccmp.org/cini