Table of Contents

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Table of Contents

VGA Expansion for 128KB RAM

Introduction

Features

Theory of Operation

Design Files

Software

Documentations

VGA Expansion for 128KB RAM

Introduction

VGAxRAM is a pc board version of the piggybacked VGA prototype.

This is VGAxRAM implemented as 2-board stack

This is VGAxRAM implemented as 2-board stack plus a PS2 interface on the RAM board

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Features

Plug in existing 128KB RAM socket

25.175MHz pixel clock, 60Hz VGA

4K dual port RAM for video memory and font lookup tables

64-macrocell CPLD, EPM7064SLC44

64 columns, 48 rows of 8×8 pixel monochrome text

Video RAM can be written any time

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Theory of Operation

The basic idea is using 128KB RAM socket as an expansion port to add more functions. VGA expansion is one such function. A 4K region of the RAM memory is mapped to VGA's video memory such that the lower 3K is text memory organized as 64 columns by 48 rows of texts and the top 1K is font lookup table where each text character is represented as 8×8 pixels. The characters are monochrome. The video RAM is a 4K dual port RAM (IDT7134) that can be written anytime by the processor; in fact it is a write-only memory from the processor point of view; a read operation of the dual port memory region fetches the content of the system RAM, not the dual-port RAM content. The other side of the dual port RAM is continuously read by the VGA controller (reside in the CPLD) and drive the VGA display at 60Hz rate.

The video display is organized as follow: the 1st video RAM location corresponds to character at the upper leftmost corner of the display, i.e. first character of the first line; next location is 2nd character of the first line; 64th video RAM location is the last character of the first line; 65th video RAM location is first character of the 2nd line; and 3072th location is the last character of the 48th line. Video memory can be written anytime without snowing, flicking or other undesirable display artifacts. Font lookup tables start from dual port RAM location 3073-4096 such that locations 3073 to 3080 is the font table for character value 0x0; and locations 4089-4096 is the font table for character value 0x7F. Each byte of the 8-byte font table represents 8 pixels of a 8×8 pixel character graphic such that first font byte is the top 8 pixels and 8th font byte is the bottom 8 pixels of a character graphic; most significant bit is leftmost pixel while least significant bit is rightmost pixel. To make the text more readable, the VGA controller generates 2 blank pixel lines between each row of characters. This way the font table graphic can be as large as 7 pixel wide, 8 pixel tall and not merge with the characters above or below the current line. Font table can be updated anytime.

The memory map of the 4K video RAM is determined in the CPLD. It can be relocated to different region by reprogram the CPLD. Currently it is mapped to locations 0x1C000-0x1CFFF.

Design Files

Schematic

Gerber photoplots

CPLD design files

CPLD equations for standard RAM pin assignment (such as Simple80)

CPLD equations for ZRCC RAM pin assignment

Bill of Materials

Software

Demonstration software running on ZRCC ← 12/19/23 updated to correct location of font table

Documentations

Pictorial Assembly Guide