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This is a two-board configuration consists of a G8PP in baseline configuration and a simple 6502 board on RC2014 backplane.
This is a prototype of the 6502 CPU card. It is superseded by the PC board version.
Schematic of prototype 6502 CPU card
The following RC2014 signals are redefined for G8PPBase+6502
RC2014 Pin 19 (nM1) — SYNC (6502 pin 7)
RC2014 Pin 23 (nMREQ) — RWB (6502 pin 34)
RC2014 Pin 24 (nWR) — Not Assigned
RC2014 Pin 25 (nRD) — Not Assigned
RC2014 Pin 26 (nIORQ) — VPB (6502 pin 1)
RC2014 Pin 37 (Spare 1) — BE (6502 pin 36)
RC2014 Pin 38 (Spare 2) — RDY (6502 pin 2)
RC2014 Pin 39 (Spare 3) — NMIB (6502 pin 6)
Serial Bootstrap, move jumper to 'Serial Bootstrap' position, load Tinyload.bin as binary file (check the 'Binary' box in TeraTerm), Tinyload will sign on with '12/26/18'
6502 Monitor
EhBASIC by Lee Davison, load 'MIN_MON.HEX' as hex file (do not check the 'Binary' box in TeraTerm), type 'G e82a' after load is completed. EhBasic will respond with '6502 EhBASIC [C]old/[W]arm ?'
ASCIIART benchmark for EhBasic.
Getting Started with G8PPBase+6502 ←configure altera epm7128, load bootstrap, load 6502 monitor, load & run EhBASIC
6502 Monitor manual