Table of Contents
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Table of Contents
CRC65 Rev2, A Single Board Computer for W65C02 and W65C816
Introduction
CRC65 stands for CPLD, RAM, CFdisk, and 6502. It is a very simple single board computer using CF disk to store system and application programs. Its simplicity allows it to run quite fast, overclocked up to 29.5MHz with W65C02. CRC65 rev2 can accommodate both W65C02 or W65C816 with different CPLD firmware and jumper changes. Discussion about CRC65 can be found here: http://forum.6502.org/viewtopic.php?f=10&t=6440
This is link to CRC65 rev1
Features
W65C02 or W65C816 operating at 14.7MHz
Selection of W65C02 or W65C816 is accomplished via jumpers and different CPLD firmware
CY7C109 RAM provides 58K of RAM space when configured to W65C02
CY7C109 RAM provides 116K of RAM space when configured to W65C816
Altera EPM7064S CPLD with the following features
64-byte boot ROM
Double-buffered serial receiver at 115200 N81
Software bit-bang transmitter operating at 115200 N81
Compact Flash interface
I2C interface
RAM decode
Bus-connected IDE44 interface.
Modified RC2014 expansion bus
50mm x 100mm 2-layer pc board
Theory of Operation
Altera EPM7064S or its equivalent Atmel ATF1504AS is the heart of CRC65. It provides 64 bytes of boot ROM located at the top of 6502's memory space. The boot ROM has two modes of operations:
CF bootstrap, where it loads the content of CF's Master Boot Record into memory at 0xB000 and execute. This is the normal mode of opertion.
Serial bootstrap, where it loads 256 bytes of serial binary data into memory at 0xB000 and execute. Serial bootstrap mode is mainly used to initialize a new CF disk to load the system and application software.
At the negation of reset, the boot ROM alternately polls serial receive ready flag or CF disk busy flag. Because CF disk typically need 1/2 second to negate its busy flag, the user can enter the serial bootstrap mode by enter a key immediately after the reset button is released. If the serial port has received an input, the boot ROM will discard the first character received and sit in a loop waiting for 256 serial binary data. The data are saved in RAM starting from location 0xB000 up to 0xB0FF. When the 256th data is received, the program execution starts at 0xB000.
Design Information
PCB photoplots
CPLD design file
CPLD for W65C816 configuration. Top level schematic of W65C816 CPLD in PDF
CPLD for W65C02 configuration. Top level schematic of W65C02 CPLD in PDF.
Memory map of CRC65
Signal definition of modified RC2014 expansion bus
Bill of Materials
Software
CFBootloader is a collection of utility software for loading software in designated locations in CF disk. This is beta version of CFBoot:
Run from 0xb17c to copy CF bootstrap code into CF's Master Boot Record
Load CRCMon.hex and run from 0xb1d9 to copy CRCMon into CF
Load Memtest.hex and run from 0xb250 to copy memory test into CF
Load min_mon.hex and run from 0xb2b3 to copy EhBASIC into CF.
CRCMon, a simple monitor for CRC65, rev0.8c.
Conway's Game of Life driving 128×64 OLED display over I2C bus. Program starts at 0xa000
Clock simulates traditional clock movement. Program starts at 0x1000