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Table of Contents
Multicomp Cyclone IV-B
Portions of the hardware and designs on this page are based on Grant Searle's original work, which was published with the following license: “By downloading these files you must agree to the following: The original copyright owners of ROM contents are respectfully acknowledged. Use of the contents of any file within your own projects is permitted freely, but any publishing of material containing whole or part of any file distributed here, or derived from the work that I have done here will contain an acknowledgement back to myself, Grant Searle, and a link back to this page. Any file published or distributed that contains all or part of any file from this page must be made available free of charge.” -http://searle.hostei.com/grant/Multicomp/index.html, retrieved 12/14/15.
Introduction
The Multicomp Cyclone IV-B (v1.3) is a motherboard which provides peripheral connectivity for a Cyclone IV FPGA development board commonly available on eBay. The board was designed by James Moxham with input from Max Scane and provides connectivity for the following peripherals:
VGA Screen with PS/2 Keyboard interface
Three RS-232 serial ports with DE-9F connectors
Connector and serial interface for ESP8266 WiFi module
SD Card connector
Two RAM sockets to support up to 1 MB of RAM.
Switch mode power supply for 3.3 and 5 volt supplies
Dual DC Jacks for multiple power options
The Cyclone IV module is mounted onto the motherboard with easy access to the AS and JTAG connectors allowing in-place programming of the FPGA.
There is now a “Green” Cyclone IV module that has a 50 mhz oscillator and works with the CycloneIVb-50 (Green).zip (.pof file) and the CycloneIVDec2015.zip (SD card files)
Z80 Emulation Features
The Z80 VHDL code is based on Grant Searle's original Multicomp which has been extended to support the additional peripherals and the increased capacity of the Cyclone IV (EP4CE6E22C8N) chip.
The VHDL code includes the following enhanced features:
Memory Management Unit supporting up to 1MB of physical RAM with 16KB pages
Individual Baud-rate generator for each serial port
20 ms interrupt generator
Reset of ESP8266 via RTS
CTS signal from serial ports
These features are supported in the ROM-MJS Enhanced Monitor
Resources
Schematic:
Filename
Filesize
Last modified
44.1 KiB
2015/12/28 20:23
FPGA and Eagle files
Filename
Filesize
Last modified
225.0 KiB
2015/12/29 14:50
102.3 KiB
2018/02/21 22:29
104.9 KiB
2016/01/04 01:41
1.5 MiB
2018/02/21 22:34