Table of Contents
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Table of Contents
ECB-4PIO-I2C Development
The original board design included:
4 Zilog PIO's.
8 i/o ports on 4 headers.
Full Z80 interrupt mode 2 support.
Updated design to include the following changes:
Correction for inverted ground and power plane.
PCF8584 I2C controller.
Two I2C pin header connector.
Reset pin header connector.
On board socket for 24LC512 flash.
Onboard socket for DS1307 RTC with battery connection header.
Jumpers to connect PCF8584 and DS1307 outputs to PIO #3
Additional power and ground connectors to i/o port headers.
Status:
Untested, boards ordered 28-Feb-2021
Board received (I2Cb), construction and testing commenced.
There are some missing silkscreen details. Corrected on version c
IC7 inputs (pin 2-3, 13-14) are swapped due to Kicad symbols changes. Corrected on version c
IC16 pin 18 should be connected to VCC not GND for correct address decoding. Corrected on version c
Pullups R9, R10, R11 changed from 4K7 to 1K. Corrected in version C
Reset connector P8 is effectively connected to /M1 not RESET.. Corrected in version c
/RST on PCF8584 is connect to /M1 not /RESET. Corrected in version c
CE-PIO1 & CE-PIO2 were swapped. Corrected in version c
First I2C bus output seen 17/4/2021! … but doesn't do anything yet.
Added pin description on silkscreen.
Successfully read data off 24LC512.
Removed /WR qualification on IC15
Allow more space for crystal, shrouded port connectors.
Change top layer to vcc plane for better power distribution.
Gate /WR with /CS to meet PCF8584 Z80 configuration requirements.
Version C committed including above changes
4PIO-I2Cd
Component placement, routing changes.
Initial ROMWBW HBIOS support.
Add jumper to connect DS1307 battery backup to backplane battery backup.
Board
Kicad files can be found here but may not be the most recent.
Current revision is ECB-4PIO-I2Cc
Pictures
I/O Addressing
The Z80 PIO I/O address range is selected by pin header block J1 and will select a 16 port address range.
Address line A7 through A4 are configurable where a jumper will select a “0” and no jumper is a “1”.
Example: Selecting address block A0h-AFh
| AB7 | AB6 | AB5 | AB4 |
| OFF | ON | ON | OFF |
| 1 | 0 | 1 | 0 |
The PCF8584 I/O address range is selected by pin header J2 an will select a 2 port address range.
Address lines A7 through A2 are configurable where a jumper will select a “1” and no jumper is a “0”.
Note this is the reverse notation to the PIO I/O addressing.
Example: Selecting address block F0h-F1h
| AB7 | AB6 | AB5 | AB4 | AB3 | AB2 | AB1 |
| ON | ON | ON | ON | OFF | OFF | OFF |
| 1 | 1 | 1 | 1 | 0 | 0 | 0 |
I2C Addressing
24LC512 devices are access on the I2C bus by first issuing a control byte. The control byte consists of a device identifier (D), the device address (A) and a bit (O) to indicate if a read or write operation is intended.
So accessing a device requires sending a bye in the following sequence: DDDDAAAO
For 24LC512 the device identifier D is 1010, device address is 000-111 and O is set based on a read 1 or write 0.
The onboard 24LC512 has a default device address of 000, with an alternate address 011 selectable through solder jumper JP1.
The control byte for the onboard 24LC512 is:
| 24LC512 | DEFAULT | ALTERNATE |
|---|---|---|
| READ | 10100001 (A1) | 10100111 (A7) |
| WRITE | 10100000 (A0) | 10100110 (A6) |
Note that changing the 24LC512 to the alternate address using J1 requires the 1-2 solder link to be cut otherwise a short between +5V and ground will occur.
For the DS1307 the device identifier D is 1101, device address A is 000 - only one device is supported on the bus, and O is set based on a read 0 or write 1.
The control byte for the onboard DS1307 is:
| DS1307 | DEFAULT |
|---|---|
| READ | 11010000 (D0) |
| WRITE | 11010001 (D1) |
A PCF8574 I2C 8-bit I/O expander is commonly used to driver LCD displays.
For PCF8574 devices, the identifier D is 0100, Up to 8 devices are supported. Backpack boards usually have 3 unbridged solder jumpers giving an address 111 - A. O is set based on a read 1 or write 0.
The control byte for the onboard DS1307 is:
| PCF8574 | DEFAULT |
|---|---|
| READ | 01001111 (4F) |
| WRITE | 01001110 (4E) |
Software & Drivers
ROMWBW
RomWBW HBIOS v3.1.1-pre.75, 2021-05-12 SBC Z80 @ 12.000MHz 0 MEM W/S, 1 I/O W/S, INT MODE 2, SBC MMU 512KB ROM, 512KB RAM UART0: IO=0x68 16550A MODE=38400,8,N,1 I2C: IO=0xF0 DS1307: 01/01/21 00:00:01 TMS: IO=0x98 NOT PRESENT MD: FLASH=1 1=29F040 FLASH FILE SYSTEM DISABLED MD: UNITS=2 ROMDISK=384KB RAMDISK=256KB FD: IO=0x36 UNITS=2 RF: IO=0xA0 WP=OFF IO=0xA4 WP=OFF DEVICES=2 PPIDE: IO=0x60 PPIDE0: LBA BLOCKS=0x003DFC20 SIZE=1983MB PPIDE1: NO MEDIA PPIDE: IO=0x20 PPI NOT PRESENT PPIDE: IO=0x44 PPI NOT PRESENT
Utilities
RTCHB - display date and time using HBIOS functions
H>rtchb 01/01/21 00:03:19
RTCDS7 - display date and time using direct access through PCF8584.
H>rtcds7 01/01/21 00:03:35
I2CSCAN - I2C Bus Scanner
H>i2cscan
I2C Bus Scanner
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F
00: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
20: -- -- -- -- -- -- -- 27 -- -- -- -- -- -- -- --
30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
50: 50 51 -- -- -- -- -- -- -- -- -- -- -- -- -- --
60: -- -- -- -- -- -- -- -- 68 -- -- -- -- -- -- --
70: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
References
Sample test code: https://www.eevblog.com/forum/projects/z80lt-gtpcf8584-i2c-interface-problem/
I2C driver code: https://github.com/ncb85/utilis-and-examples/tree/master/cpm_i2c
6809 Interface: https://www.aslak.net/index.php/2013/07/18/i2c-on-a-6809-computer-and-a-mini-review-of-a-logic-analyser/
Understanding the I2C Bus - Texas Instruments: https://www.ti.com/lit/an/slva704/slva704.pdf
Linux C driver: https://code.woboq.org/linux/linux/drivers/i2c/algos/i2c-algo-pcf.c.html
I2CScan code: https://groups.google.com/group/retro-comp/attach/25120f43d0386/I2CSPI.ZIP?part=0.1
Key Learnings
Black solder mask PCBs are terrible for development debugging. Very hard to see traces.
Size of pullup resistors is important on open collector outputs. There is a huge difference in rise time between 1K and 4K7 pullups.
Make provisions for I2C device and bus timeouts to avoid lockups.
Do a hard reset between each software test to ensure consistent results. Exiting in a known state is important.
Software control of hard reset is desirable as soft reset does guarantee consistent results.