/* Imported from Wayback Machine
   Original URL : https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:protorc3:65spi_proto
   Snapshot date: 2025-09-09
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==== Table of Contents ====

[[#spi_prototype|65SPI Prototype]]

[[#introduction|Introduction]]

[[#features|Features]]

[[#design_information|Design Information]]

[[#engineering_changes|Engineering changes]]

[[#software|Software]]

[[#manuals|Manuals]]

====== 65SPI Prototype ======

===== Introduction =====

[[https://sbc.rictor.org/|Daryl Rictor's]] 65SPI design is captured in Altera Quartus schematic and prototyped with ProtoRC3. This page describes the 65SPI design in Altera schematic, its prototype, and testing.

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===== Features =====

===== Design Information =====

Schematic

[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=builderpages:plasmo:protorc3:65spi_proto:protorc3_65spi_cpld_released.zip|CPLD design]]. In order to fit the existing ProtoRC3 pin assignments, the following I/O pins from the original 65SPI are deleted: MWR, MRD, CS2, Slave Select 3 to Slave Select 7.

==== Engineering changes ====

The followings are changes to ProtoRC3 to accommodate 25LC080 serial EEPROM

=== Data bus modifications ===

Test point T15 to D7, RC2014-34

Test point T14 to D6, RC2014-33

Test point T13 to D5, RC2014-32

Test point T12 to D4, RC2014-31

Test point T11 to D3, RC2014-30

Test point T10 to D2, RC2014-29

Test point T9 to D1, RC2014-28

Test point T8 to D0, RC2014-27

=== 25LC080 Connections ===

25LC080-1 (CS) to Test point T4

25LC080-2 (SO) to Test point T2

25LC080-3 (WP) to +5V

25LC080-4 (GND) to ground

25LC080-5 (SI) to Test point T1

25LC080-6 (SCK) to Test point T3

25LC080-7 (HOLD) to +5V

25LC080-8 (VCC) to +5V

==== Software ====

25LC080 test software

===== Manuals =====

[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=builderpages:plasmo:protorc3:65spi_proto:25lc080.pdf|25LC080 data sheet]]