/* Imported from Wayback Machine Original URL : https://retrobrewcomputers.org/doku.php?id=builderpages:abingham:phpnotes Snapshot date: 2025-12-08 Generator : wayback-archiver */ ====== PHP Notes ====== Format of messed up notification email: --------------96412276711959624513665731661006949428 Content-Type: text/plain; charset=3Dutf-8; format=3Dflowed Content-Transfer-Encoding: 8bit Hi all Quick update: I have the "secondary" MF/PIC board assembled. It provides UA= RT and IDE interfaces only, interrupts are routed (through spare inverters)= to the bus IRQ lines (I am using IRQ0 for serial, IRQ1 for IDE) and handle= d by the NS32202 on the primary MF/PIC. About a dozen chips on the secondar= y board can be omitted. Both IDE and UART interfaces are confirmed working. I have swapped the AHCT login on the bus transceivers for LS series. No noi= se issues observed (so far!) in combinations of bus slots which were previo= usly problematic. I had some issues with the interrupt controller; the timer would stop ticki= ng when Linux booted. Resolved by increasing from 2 to 3 wait-states on I/O= . I have not had this previously, unclear if the change to slower LS logic = on the transceivers is related. I have enough chips to swap all back to AHC= T so I may try that when I have the software issues sorted. I have PPP up and running on the second UART; I can ping stuff on the inter= net etc. However some issues remain to investigate: root@darkstar:~# wget sowerbutts.com --2016-03-04 22:11:33-- http://sowerbutts.com/ Resolving sowerbutts.com (sowerbutts.com)... 195.149.84.65 Connecting to sowerbutts.com (sowerbutts.com)|195.149.84.65|:80... connecte= d. HTTP request sent, awaiting response... 200 OK Length: 2188 (2.1K) [text/html] Saving to: 'index.html' index.html 0%[ ] 0 --.-KB/s in 0s 2016-03-04 22:11:33 (0.00 B/s) - Read error at byte 0/2188 (Invalid argumen= t). Retrying. Possibly wget is using some kernel feature I've compiled out, or maybe it d= oesn't like the fact that our timers have only 10ms resolution. Need to inv= estigate. Telnet to port 80 on the web server and typing the request in by = hand works fine so the TCP stack is certainly working. I have issues with interrupt priorities; with the 1Mbit/sec serial port on = IRQ0 (highest priority) it is possible to send data at 1Mbit/sec and overwh= elm the machine. Similarly with second IDE on IRQ1 and timer on IRQ8 when y= ou use the second IDE interface heavily about 60% of timer interrupts are l= ost. I have looked in the NS32202 datasheet and I see it has several different p= riority modes including a "rotating priority" mode. Also there is the optio= n of edge/level triggering. There is also interrupt nesting to consider. I= need to sit down and figure out which modes would be best and how they wou= ld interact with Linux's IRQ handling. It may be that the best solution is actually to have the timer as the highe= st priority interrupt, followed by the serial ports, with IDE last. This ma= y mean some more hardware mods to re-arrange to fit the required order. Can anyone confirm my ideas about the '202; - An EOI cycle (ie read with A13 set) simply clears the highest priority b= it that is set in the ISRV register - The CPU can also clear the bit in ISRV itself by reading, masking, and w= riting back the register; doing this removes the need for a separate EOI - Writing (eg) 8 to FPRT will make IRQ8 the highest priority, so the prior= ity order becomes: 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 ie = it just rotates the priority around -- the datasheet is unclear on this poi= nt. Also can anyone confirm my understanding that we could run all the devices = on this system in EITHER edge or level triggered modes without issue. If anyone has thoughts on edge vs level, priorities, and the various modes = of the 202, input would be most welcome at this stage. Hmmmmmm. Lots to think about! But enough for tonight. Tomorrow I am in Lond= on all day so it will probably be Sunday before I get to look at this again. To participate in the discussion, go here: http://www.retrobrewcomputers.or= g/forum/index.php?t=3Drview&th=3D38 --------------96412276711959624513665731661006949428 Content-Type: text/html; charset=3Dutf-8 Content-Transfer-Encoding: 8bit RetroBrew Computers Forum Subject: Re: Linux on KISS-68030 single board com= puter Author: will Date: Fri, 04 March 2016 22:43 =09=09 Hi all Quick update: I have the "secondary" MF/PIC board assembled. It p= rovides UART and IDE interfaces only, interrupts are routed (through spare = inverters) to the bus IRQ lines (I am using IRQ0 for serial, IRQ1 for IDE) = and handled by the NS32202 on the primary MF/PIC. About a dozen chips on th= e secondary board can be omitted. Both IDE and UART interfaces are confirmed working. I have swapped the AHCT login on the bus transceivers for LS series. No noi= se issues observed (so far!) in combinations of bus slots which were previo= usly problematic. I had some issues with the interrupt controller; the timer would stop ticki= ng when Linux booted. Resolved by increasing from 2 to 3 wait-states on I/O= . I have not had this previously, unclear if the change to slower LS logic = on the transceivers is related. I have enough chips to swap all back to AHC= T so I may try that when I have the software issues sorted. I have PPP up and running on the second UART; I can ping stuff on the inter= net etc. However some issues remain to investigate: 
root@darkstar:~# wget sowerbutts.com
--2016-03-04 22:11:33--  http://sowerbutts.com/
Resolving sowerbutts.com (sowerbutts.com)... 195.149.84.65
Connecting to sowerbutts.com (sowerbutts.com)|195.149.84.65|:80... connecte=
d.
HTTP request sent, awaiting response... 200 OK
Length: 2188 (2.1K) [text/html]
Saving to: 'index.html'

index.html            0%[                    ]       0  --.-KB/s    in 0s

2016-03-04 22:11:33 (0.00 B/s) - Read error at byte 0/2188 (Invalid argumen=
t). Retrying.
Possibly wget is using some kernel feature I've compiled out, or maybe it d= oesn't like the fact that our timers have only 10ms resolution. Need to inv= estigate. Telnet to port 80 on the web server and typing the request in by = hand works fine so the TCP stack is certainly working. I have issues with interrupt priorities; with the 1Mbit/sec serial port on = IRQ0 (highest priority) it is possible to send data at 1Mbit/sec and overwh= elm the machine. Similarly with second IDE on IRQ1 and timer on IRQ8 when y= ou use the second IDE interface heavily about 60% of timer interrupts are l= ost. I have looked in the NS32202 datasheet and I see it has several different p= riority modes including a "rotating priority" mode. Also there is= the option of edge/level triggering. There is also interrupt nesting to c= onsider. I need to sit down and figure out which modes would be best and ho= w they would interact with Linux's IRQ handling. It may be that the best solution is actually to have the timer as the highe= st priority interrupt, followed by the serial ports, with IDE last. This ma= y mean some more hardware mods to re-arrange to fit the required order. Can anyone confirm my ideas about the '202; - An EOI cycle (ie read with A13 set) simply clears the highest priority b= it that is set in the ISRV register - The CPU can also clear the bit in ISRV itself by reading, masking, and w= riting back the register; doing this removes the need for a separate EOI - Writing (eg) 8 to FPRT will make IRQ8 the highest priority, so the prior= ity order becomes: 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7 ie = it just rotates the priority around -- the datasheet is unclear on this poi= nt. Also can anyone confirm my understanding that we could run all the devices = on this system in EITHER edge or level triggered modes without issue. If anyone has thoughts on edge vs level, priorities, and the various modes = of the 202, input would be most welcome at this stage. Hmmmmmm. Lots to think about! But enough for tonight. Tomorrow I am in Lond= on all day so it will probably be Sunday before I get to look at this again= . =09=09 [ Reply ][ Quote ][ View Topic/Message ][ Unsubscribe from this topic ] --------------96412276711959624513665731661006949428-- How to fix? Make sure FUDForum is sending a notification email: Look for “Content-Type: text/plain”, “Content-Type: text/html”, and 3x dividers “————–”. If all three are present, split out the plain text and html and add to the POST request used to send the notification email. HTML is easy - look for position of and and split out this section Plain text is a bit harder -