/* Imported from Wayback Machine
   Original URL : https://www.retrobrewcomputers.org/doku.php?id=boards:ecb:dma:development
   Snapshot date: 2023-09-21
   Generator    : wayback-archiver
*/

====== ECB-DMA development. ======

{{[[lib:plugins:ckgedit:fckeditor:userfiles:image:boards:ecb:dma:gallery:ecb-dma-r01a.png]]

Current gerbers are [[https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=boards:ecb:dma:ecb-dma-r01a-gerbers.zip|here]].

Current Kicad files are [[https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=boards:ecb:dma:ecb-dma-r01a.zip|here.]]

Errata : The output of U6b pin 6 must be inverted before pin 1 of U10. i.e. the direction signal is incorrect. Updated in version 001B

====== Port Decoding ======

SW1 sets the base port address for the DMA board. Two ports are decoded for the DMA board from anywhere within the Z80 port range of 00-FFh.

^Port    ^Example^Function          ^
|Base + 0|E0h    |DMA Chip access   |
|Base + 1|E1h    |RDY control signal|

Note that A0 is not set on SW1 and A7-A1 are in reverse order. A binary 0 is set by a jumper. A binary 1 is set by having no jumper.

Example for setting SW1 to suit base address E0h

E0H (A7-A0) = 11100000b

Reversed (A0-A7) = 00000111b

Drop A0, (A1-A7) = 0000111b

Set all 0 positions with a (J)umper. All 1 positions are left (U)njumpered

^A1^A2^A3^A4^A5^A6^A7^
|J |J |J |J |U |U |U |

====== Theory of Operation ======

//Interrupt Logic Support.//

The Z80 DMA supports interrupts. 74LS08 U1A and U1B implement the Z80 interrupt daisy chain with lookahead logic.

//Board Select Logic//

74LS688 provides port selection logic for 2 I/O ports and is qualified by ~M1 and ~IORQ.

The ~CE_DMA_BRD signal is generated and is used to qualify the Z80 DMA ~CE/~WAIT line and the data direction logic.

//Data Direction Logic//

74LS245 U10 bus transceiver controls the direction of the data bus. When the DMA board is idle the direction is “data-in”.

The data direction will switch to “data-out” if:

a read is made to the base port address

\\