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==== Table of Contents ====

[[#z80all_rev3_with_plcc84_cpld|Z80ALL Rev3 with PLCC84 CPLD]]

[[#introduction|Introduction]]

[[#features|Features]]

[[#theory_of_operation|Theory of Operation]]

[[#design_files|Design Files]]

[[#software|Software]]

====== Z80ALL Rev3 with PLCC84 CPLD ======

===== Introduction =====

Z80ALL rev3 is very similar to Z80ALL rev2 except the CPLD is redesigned in PLCC84 package which is cheaper and easier to assemble

[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?tok=27f9cb&media=https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/builderpages/plasmo/z80all/z80allplcc/dsc_75980220.jpg|{{https://www.retrobrewcomputers.org/lib/exe/fetch.php?w=600&h=532&tok=4da6fd&media=https%3A%2F%2Fwww.retrobrewcomputers.org%2Flib%2Fplugins%2Fckgedit%2Ffckeditor%2Fuserfiles%2Fimage%2Fbuilderpages%2Fplasmo%2Fz80all%2Fz80allplcc%2Fdsc_75980220.jpg?600x532|www.retrobrewcomputers.org_lib_plugins_ckgedit_fckeditor_userfiles_image_builderpages_plasmo_z80all_z80allplcc_dsc_75980220.jpg}}]]

===== Features =====

Z80 overclocked to 25.175MHz

128K RAM in 4 32-K banks

4K dual port video RAM with user programmable font table.

VGA monochrome interface, 64 columns X 48 rows

Easy to assemble EPM7128S in PLCC84 package

EPM7128S CPLD with the following features

Small ROM to bootstrap from CF disk

VGA timing circuit

Serial port for hardware/software development

Memory bank select logic

Decoding logic for compact flash

IDE44 interface for compact flash drive

CP/M ready

PS2 keyboard interface

3 RC2014 expansion bus

Optional USB-serial connector

102mm X 102mm 4-layer pc board

Nominal power consumption of 5V 300mA

===== Theory of Operation =====

Z80ALL boots through the 32-byte ROM embedded in the CPLD which loads and executes code on compact flash's Master Boot Block; which, in turn, loads and executes a monitor located in Track 0 of compact flash; thus the CF disk serves as the traditional EPROM loading code into RAM and executing in RAM.

The VGA interface is through a 4Kx8 dual port RAM. One side of the dual port RAM is read/write accessible by Z80 as 4K I/O space. 3K of the I/O space maps to each character of the 64×48 display; the top 1K is font lookup table for characters 0x0-0x7F. Z80 can read/write to its side of dual port RAM anytime without affecting video display quality. The other side of the dual port RAM is read only accessible by VGA timing circuit in CPLD. It reads each character and looks up corresponding font and output the pixel representation of the character on RGB output. This is a monochrome display.

===== Design Files =====

[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=builderpages:plasmo:z80all:z80allplcc:z80all_rev3_scm.pdf|Schematic]]

[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=builderpages:plasmo:z80all:z80allplcc:z80all_r3_gerber.zip|Gerber photoplots]]

[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=builderpages:plasmo:z80all:z80allplcc:z80all_rev3pcb_cpld_84plcc.zip|CPLD design files]] ← updated 4/2/24 to fix missing VGA connector pads in ground layer

Bill of Materials

[[builderpages:plasmo:z80all:z80all_rev1:z80allr1quad:mem_io_map|Memory and I/O map]]

==== Software ====

Z80ALL rev3 software is same as [[builderpages:plasmo:z80all:z80all_rev1:z80allr1quad|Z80ALL rev2 software]]