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====== Secondary MF/PIC Board ======

//Will Sowerbutts, 2016-03-12//

While working on the KISS-68030 Linux port I wanted to get an internet connection to the machine. The simplest way to do this was to run PPP over a serial link, however I was already using the only serial port in the machine as the system console. It is not possible to have two standard MF/PIC boards in a single system as the two interrupt controllers will conflict with each other. With only minor modifications it is possible to build a “secondary” MF/PIC board which includes only the UART and parallel/IDE interfaces, omitting the interrupt controller and real-time clock, this page explains how to do so.

The interrupts from the UART and IDE device are sent over the ECB bus to the interrupt controller on the primary MF/PIC board, so this board will only operate as a secondary device in a system which already includes a primary (ie fully functional) MF/PIC controller. You may have up to four secondary MF/PIC boards in the system since each board uses two ECB interrupt lines, of which there are eight available in the system.

The secondary MF/PIC board described here also replaces the RS232 port with a USB interface using an FTDI FT232RL breakout board (readily available on ebay for around $3; be sure to get one which makes the RTS and CTS pins available). By fitting a 16MHz oscillator baud rates up to 1Mbit/sec may be achieved.

To construct the secondary board, fit **only** the following components:

U5 (74LS244)

U6 (74LS244)

U8 (74LS244)

U9 (74LS688)

U10 (74LS02)

U11 (74LS04)

U13 (74LS139)

U14 (74LS245)

U22 (82C55)

U27 (74LS32)

U30 (16C550/17C750 - I recommend TL16C750FN)

U31 (Oscillator - I fitted 16MHz for high speed operation; use 1.8432MHz, 7.3278MHz or 14.7456MHz for “standard” baud rates)

RP2 (47K resistor network)

J2 (reset jumper)

J3 (power to IDE interface)

P3, P4 (13×2 and 20×2 IDC headers)

P5 (I/O address selection jumpers)

Capacitors (C0 and decoupling caps, I chose to fit all the decoupling caps even those for unpopulated ICs although this is probably excessive)

At high speeds it is recommended to fit **74LS** family logic for all bus transceivers as these have superior immunity to bus noise.

At position J3 I fitted a 30V 0.9A [[https://en.wikipedia.org/wiki/Resettable_fuse|PPTC resettable fuse]] between the center and +5V pins. This provides good protection against accidentally plugging the IDE device in incorrectly, which may otherwise short out +5V and GND and burn out a PCB trace.

Instead of U32/U33 (MAX232/MAX235) I fitted a FT232RL TTL serial to USB adapter breakout board. I used hot-glue to secure the breakout board where the supercapacitor would normally live, on the top left of the board. The hot-glue gives mechanical stability and ensures an insulating layer between the breakout board and the main PCB. I set the I/O voltage selection jumper on the FT232RL board to “5V”. I then used patch wires to connect the breakout board to the footprint that the MAX232 would normally occupy:

FT232RL “**GND**” pin to J3 pin 1 (**GND**)

FT232RL “**RTS**” pin to U32 pin 9

FT232RL “**CTS**” pin to U32 pin 10

FT232RL “**RXD**” pin to U32 pin 11

FT232RL “**TXD**” pin to U32 pin 12

The interrupt lines from the IDE interface and the UART interfaces are active high but the ECB IRQ lines are active low, so it is necessary to route them through spare inverters on the board. All the ECB interrupt lines are easily accessible on the footprint for the unfitted RP1 resistor network, so you can easily route each device's interrupt to any ECB IRQ line.

To route the IDE interrupt:

Connect U10 pin 8 to U10 pin 9

Connect U10 pin 9 to U15 pin 8 (note: chip not fitted, this is just a convenient GND) via a 10K resistor; this pulls the interrupt line low when no disk is connected.

Connect U10 pin 8 to P4 pin 31

Connect U10 pin 10 to RP1 pin 2 (ECB IRQ 7)

To route the UART interrupt:

Isolate U11A by cutting two traces:

Between U11 pin 1 and RP2 pin 7; I cut it on the top side of the board just next to pin 1.

Between U11 pin 2 and U10 pin 6; I cut it on the bottom side of the board between pin 2 and a via.

Connect U15 pin 13 to U11 pin 1

Connect U11 pin 2 to RP1 pin 9 (ECB IRQ 0)

I have my secondary MF/PIC board at base I/O address 0x50.

When booting Linux it is necessary to inform the kernel where to find any secondary MF/PIC boards. The kernel accepts command line arguments of the form “mfpic=<addr>,<ideirq>,<uartirq>,<uartclk>”, so for my system I use “mfpic=0x50,7,0,16000000”. When booting the kernel reports:

<code code>
[    0.560000] MF/PIC at I/O address 0x40, IDE ECB IRQ 9, UART ECB IRQ 12, UART clock 1843200 Hz
[    0.590000] MF/PIC at I/O address 0x50, IDE ECB IRQ 7, UART ECB IRQ 0, UART clock 16000000 Hz
...
[    2.130000] serial8250.0: ttyS0 at MMIO 0xffff0048 (irq = 20, base_baud = 115200) is a TI16750
[    2.190000] serial8250.1: ttyS1 at MMIO 0xffff0058 (irq = 8, base_baud = 1000000) is a TI16750
...
[    2.230000] ide0: KISS-68030 MF/PIC IDE controller
[    2.550000] hda: SanDisk SDCFHSNJC-008G, CFA DISK drive
[    3.270000] ide0 at 0xffff0044 on irq 17
[    3.300000] ide1: KISS-68030 MF/PIC IDE controller
[    4.110000] hdc: SDCFXPS-016G, CFA DISK drive
[    4.830000] ide1 at 0xffff0054 on irq 15
</code>

Photos of my completed board are included below for reference.

{{https://www.retrobrewcomputers.org/lib/exe/fetch.php?w=1024&h=1788&tok=e97d9f&media=boards:ecb:mf-pic:mfpic-secondary-front-scaled.png?1024x1788}}{{https://www.retrobrewcomputers.org/lib/exe/fetch.php?w=1024&h=1728&tok=a56586&media=boards:ecb:mf-pic:mfpic-secondary-back-scaled.png?1024x1728}}