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--- dev:boards:neutronpc32 [2025/01/15 02:28] – Revision from 2025-01-15
+++ dev:boards:neutronpc32 [2026/06/15 13:25] (current) – external edit 127.0.0.1
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+/* Imported from Wayback Machine
+   Original URL : https://retrobrewcomputers.org/doku.php?id=dev:boards:neutronpc32
+   Snapshot date: 2021-04-13
+   Generator    : wayback-archiver
+*/
+====== Neutron PC32 ======
+The Neutron PC32 (Portable Computer 32K) is a work-in-process portable 65C02 homebrew computer that runs off either a 9V battery or a DC power supply.
+===== Hardware =====
+At the heart of the PC32 is a CMOS 6502 from Western Design Center, the W65C02S6TPG-14. This is the PDIP-40 variant that can run at up to 14 MHz. However, we will not be running the microprocessor at that speed. Instead, the aim is to run it at 8 MHz, falling back to 4 MHz or even 2 MHz if necessary.
+The “32” in “PC32” stands for the 32 kibibytes (1,024 bytes = kibibyte; 1,000 bytes = kilobyte) of static random access memory (or SRAM) that the system uses as working memory. The specific chip that is planned for use will be the AS6C62256A-70PCN from Alliance Memory, with an access time of 70 nanoseconds (the minimum access time for a W65C02S running at 8 MHz). However it has recently been tagged as EOL, and all the other suitable parts are roughly 10 times the price.
+After the 32 kibibytes of working memory, we have 8 kibibytes of memory-mapped input and output hardware. This includes two W65C22S6TPG-14 Versatile Interface Adapters (VIAs), a W65C51N6TPG-14 Asynchronous Communication Interface Adapter (ACIA), the display, the sound hardware, the keyboard controller, etc.
+After the MMIO, we have three 8 kibibyte areas for ROMs. The first two 8K areas are banked – using four pins each off of one of the VIAs, these 8K sections of the memory map actually contain up to 128 kibibytes of code. The first 8K area is for up to 128 kibibytes of extra ROM, or xROM, added to the computer via the xCard slot. The xCard slot can also add additional MMIO devices. After the xROM, we have the 128 kibibyte program ROM, or pROM, which contains programs like BASIC. Finally, we have the 8 kibibyte system ROM, or sROM. The sROM is an AT28C64B EEPROM chip, while the pROM is an AT27C010 OTPROM chip.
+Now onto the MMIO in more detail: All MMIO devices are located from hex 8000 to hex 9FFF. Addresses hex 8000 to hex 801F are for the VIAs, while addresses hex 8020 through hex 8029 are for the ACIA, display, speaker, and keyboard. (More specifically, hex 8020 through hex 8023 is for the ACIA, hex 8024 and hex 8025 are for the display, hex 8026 and hex 8027 are for the keyboard, hex 8028 is for the speaker, and hex 8029 is for the interrupt logic). The pins on the VIAs are used like so:
+VIA0:
+Port B: xROM & pROM Banking
+Port A: Detect Pins, Character Size Select & Check, and Commodore IEC Interface
+VIA1:
+Port B: Parallel Port Output (MOSI)
+Port A: Parallel Port Input (MISO)
+The display interface is dependent on the screen used. Here, a Newhaven Display NHD-240128WG-ATFH-VZ# is being used, which is a graphical LCD. It has two registers: one for data and one for commands. Data register is hex 8024, command register is hex 8025. It supports either 30×16 or 40×16. Sadly, neither fits in a neat number of bytes, nor does a line fit into a neat number of bytes. 30×16 requires 480 bytes, which is 1.875 pages, and a page can fit 8.53 lines. 40×16 requires 640 bytes, which is 2.5 pages, and a page can fit 6.4 lines. Not a neat number either way :<
+The keyboard interface is being accomplished using an Atmel AVR microcontroller for the purpose of simplicity. Specifically, the atmega4809 is being used. Some pins are being used for the actual keyboard interface, others are being used to interface with the 6502. It will have two registers: a data register and a flag register. The data register will contain the ASCII code for the last key pressed. If needed and allowed, a buffer will be created to hold multiple ASCII codes. The flag register will contain multiple flags, including disabling interruption, disablling buffering, and disabling keyboard input all together. The keyboard matrix is 6 rows by 14 columns for a maximum of 84 keys. However, only 72 keys are being used.
+Finally, the speaker. This will be connected with an 8-bit 1-channel DAC (DAC08CPZ). The processor can then pump bytes into the DAC to create sounds which are then played by the speaker. The exact speaker being used is currently unknown, but it will not be a piezo speaker. I want it to actually sound half decent.
+===== Software =====
+The system ROM contains… well, I'm not sure I would call it an operating system, it's just a menu, interrupt service routines, and a bunch of callable subroutines. The program ROM, as you might guess, contains a bunch of built-in programs. Specifically, 16 programs. These being an implementation of the BASIC programming language, a combination assembler and machine monitor, a script and text file editor, a relative file editor, a bitmap and font editor, a beep sequence editor, a file manager, a parallel and serial terminal, a bitmap and font viewer, a beep sequence player, and six other programs that I haven't figured out yet.