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--- builderpages:speed3ple:ecb-sbc-v2-004z [2025/03/15 07:38] – Revision from 2025-03-15
+++ builderpages:speed3ple:ecb-sbc-v2-004z [2026/06/15 13:22] (current) – external edit 127.0.0.1
@@ Line 1: / Line 1: @@
+/* Imported from Wayback Machine
+   Original URL : https://retrobrewcomputers.org/doku.php?id=builderpages:speed3ple:ecb-sbc-v2-004z
+   Snapshot date: 2025-02-12
+   Generator    : wayback-archiver
+*/
+====== ECB SBC v2 004z: ======
+**Update**: 20Mhz seems to be stable when using AHCT chips.\\
+Tested on a 4-slots backplane together with DiskIO/CF, DualSD and PropIO over 3 days of continuous load (Generating 1000's of mandelbrots and storing some data to disk)
+The 004z version seems very stable at 4, 10 and 12Mhz using 74LS chips but; i had to add a 1K resistor between pin12 and pin14 on U26 (74ls06) to get a clean looking CPU clock pulse. Speed change works. Sound works. Recovery switch has not been tested yet, but I will test the RI switch alternative soon.
+My DS1210 chip was probably fake and was causing trouble, socket is now jumpered for bypass.\\
+DS1302N RTC chip runs fairly accurate and the supercap keeps the time/date when board is powered off.
+RomWBW settings: I have included the “**DSRTCCHG .SET TRUE**” in “SBC_std.asm” file to enable charging of the supercap at boot.
+^Text                                 ^Images                                                                                                                                                                                                                                                                                         ^
+|SBC v2 004z completed:               |{{[[lib:plugins:ckgedit:fckeditor:userfiles:image:builderpages:speed3ple:images:img_20200327_235402small.jpg]]    |
+|CPU clock resistor mod:              |{{[[lib:plugins:ckgedit:fckeditor:userfiles:image:builderpages:speed3ple:images:img_20200319_170317_1small.jpg]]
+|\\ 20Mhz version using AHCT chips:\\ |{{[[lib:plugins:ckgedit:fckeditor:userfiles:image:builderpages:speed3ple:images:img_20200804_104034small.jpg]]    |
+\\