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--- builderpages:plasmo:zrc:simm30tester [2025/10/08 09:52] – Initial import from Wayback Machine
+++ builderpages:plasmo:zrc:simm30tester [2026/06/15 12:03] (current) – external edit 127.0.0.1
@@ Line 1: / Line 1: @@
+/* Imported from Wayback Machine
+   Original URL : https://www.retrobrewcomputers.org/doku.php?id=builderpages:plasmo:zrc:simm30tester
+   Snapshot date: 2025-10-08
+   Generator    : wayback-archiver
+*/
+====== 30-pin SIMM Memory Tester ======
+===== Introduction =====
+I purchased big lot of memory sticks many years ago. Among them is about 30 30-pin SIMM memories. I've modified a ZRC to test these memories.
+[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?tok=37f7fe&media=https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/builderpages/plasmo/zrc/dsc_77870110.jpg|{{https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/builderpages/plasmo/zrc/dsc_77870110.jpg?600x400|www.retrobrewcomputers.org_lib_plugins_ckgedit_fckeditor_userfiles_image_builderpages_plasmo_zrc_dsc_77870110.jpg}}]]
+[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?tok=a2a38e&media=https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/builderpages/plasmo/zrc/dsc_77880110.jpg|{{https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/builderpages/plasmo/zrc/dsc_77880110.jpg?600x400|www.retrobrewcomputers.org_lib_plugins_ckgedit_fckeditor_userfiles_image_builderpages_plasmo_zrc_dsc_77880110.jpg}}]]
+===== Engineering Changes =====
+Two SIMM30 sockets are ganged together:
+|SIMM pins|Signal Names|ZRC Signals |
+|1        |5V          |T2          |
+|2        |nCAS        |T5          |
+|3        |D0          |RC2014-27   |
+|4        |MA0         |T11         |
+|5        |MA1         |T12         |
+|6        |D1          |RC2014-28   |
+|7        |MA2         |T13         |
+|8        |MA3         |T14         |
+|9        |GND         |T3          |
+|10       |D2          |RC2014-29   |
+|11       |MA4         |T15         |
+|12       |MA5         |T16         |
+|13       |D3          |RC2014-30   |
+|14       |MA6         |T17         |
+|15       |MA7         |T18         |
+|16       |D4          |RC2014-31   |
+|17       |MA8         |T19         |
+|18       |MA9         |T20         |
+|19       |MA10        |T21         |
+|20       |D5          |RC2014-32   |
+|21       |nWE         |R8-2        |
+|22       |GND         |T3          |
+|23       |D6          |RC2014-33   |
+|24       |MA11        |NC          |
+|25       |D7          |RC2014-34   |
+|26       |            |NC          |
+|27       |nRAS        |T4          |
+|28       |Parity RAS  |4.7K pull up|
+|29       |            |NC          |
+|30       |5V          |T2          |
+===== CPLD Modifications =====
+Since ZRC already has a 2megx8 DRAM, the mulitplexed addresses for DRAM are duplicated to drive T11-T21 (MA0-MA10). The RAS, CAS, and WE to DRAM are also duplicated in T4, T5, R8-2, respectively. The control lines to onboard 2megx8 DRAM is negated, so ZRC runs from the SIMM30 memory.
+[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=builderpages:plasmo:zrc:zrc_simm_tester.zip|CPLD design files]]