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builderpages:muellerk:multicomp_july_2019 [2021/04/16 09:26] – Revision from 2021-04-16 builderpages:muellerk:multicomp_july_2019 [2026/06/15 13:03] (current) – external edit 127.0.0.1
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 /* Imported from Wayback Machine /* Imported from Wayback Machine
    Original URL : https://www.retrobrewcomputers.org/doku.php?id=builderpages:muellerk:multicomp_july_2019    Original URL : https://www.retrobrewcomputers.org/doku.php?id=builderpages:muellerk:multicomp_july_2019
-   Snapshot date: 2021-04-16+   Snapshot date: 2022-05-18
    Generator    : wayback-archiver    Generator    : wayback-archiver
 */ */
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 ===== Helpful hints for assembling ===== ===== Helpful hints for assembling =====
  
-//**NEW: I2c-EEProm-Clock-Module Adapter**// +//**I2c-EEProm-Clock-Module Adapter**// I've slightly modified the old adapter this way, that the DS3231 clock module is now soldered to the PCB. Still remove the old pinheader and solder a new straight one the IC side so the module can be soldered with the battery holder on top to the PCB. See picture 1 below. A 3D view is included as a subpicture. The two IO's on the I2C Header are renamed to INT1 & INTB. At present they are not used as interrupt input, but they are now additional IO's of the PIO-Port0 on the Joystick PCB. More in the Multicomp System Manual downloadable below. All data is in the archive “Multicomp-July-2019_V1.0.0_I2C-Clock_EEPROM-Adapter.tar.gz”
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-I've slightly modified the old adapter this way, that the DS3231 clock module is now soldered to the PCB. Still remove the old pinheader and solder a new straight one the IC side so the module can be soldered with the battery holder on top to the PCB. See picture 1 below. A 3D view is included as a subpicture. The two IO's on the I2C Header are renamed to INT1 & INTB. At present they are not used as interrupt input, but they are now additional IO's of the PIO-Port0 on the Joystick PCB. More in the Multicomp System Manual downloadable below.All data is in the archive “Multicomp-July-2019_V1.0.0_I2C-Clock_EEPROM-Adapter.tar.gz” +
- +
-//**OLD: Swiss-Pi Adapter: Adding a Clock Module**//\\ +
-If it is intend to mount a DS3231 clock module on the PCB, drilling the holes at the right position is a concern. To get the appropriate hole spacing and position, prepare a small piece of a experimental board with 4 holes as shown in picture1, then glue it with double sided tape to the position you want to drill (check that the module doesn't collide with pin-header J1 and J2). The resistors R2 & R3 must be installed on the bottom side of the PCB and soldered on the TOP side later on when installing the other components and before you install the clock module ! +
- +
-If this is done you are ready to solder all parts on the PCB except the clock module. This comes as last. On the clock module the old pin header must be removed and replaced by a new vertical one installed on the TOP side where the DS3231 IC is located. Put a small piece of double sided tape on top of the DS3231 and glue the module on the PCB, the header pins must go through the holes ! Now everything is ready for the last step. The Picture shows how the pin header of the module has to be connected to J1. On the top left side is shown how the clock module with the new pin header is installed on the PCB. The shown wiring is only valid for the ECKSTEIN module on right hand side of picture1 !+
  
 //**Joystick-PCB: Preparing J5, R21/R22 for soldering first**//\\ //**Joystick-PCB: Preparing J5, R21/R22 for soldering first**//\\
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 Now ready for Serial-A…-C and the I2c-Interface. Next stop is having a program to set/read the RTC. While the RSX for the I2c-Interface is ready now, but - that's life - the targeted (2nd) I2c-controller refuses to cooperate. Therefore I will put it aside for some time and give it a 2nd try later - may be.Yet I've to stay with the 1st one - what is no real drawback.. Max. transfer speed is 600kHz (for the RSX), so the usual used 100kHz & 400kHz are covered. I've updated the VHDL code, because 2 minor bugs came up when routing the 'BUSY' signal from the I2c-Controller to the Drive activity LED (LED0 on the FPGA board). So you should update the FPGA binary code. Both archives incl. the usual sources, the RSX, a ref-manual and a demo to show how to use the RSX-library. The archive 'rtc-1.0.tar.gz' includes no RSX, it offers 3 CPM3 console commands that handle time data transfers from the CPM3 system-clock to the RTC and vice vesa. The 3rd program displays the RTC-Time. More in the incl. Ref-Manual. Now ready for Serial-A…-C and the I2c-Interface. Next stop is having a program to set/read the RTC. While the RSX for the I2c-Interface is ready now, but - that's life - the targeted (2nd) I2c-controller refuses to cooperate. Therefore I will put it aside for some time and give it a 2nd try later - may be.Yet I've to stay with the 1st one - what is no real drawback.. Max. transfer speed is 600kHz (for the RSX), so the usual used 100kHz & 400kHz are covered. I've updated the VHDL code, because 2 minor bugs came up when routing the 'BUSY' signal from the I2c-Controller to the Drive activity LED (LED0 on the FPGA board). So you should update the FPGA binary code. Both archives incl. the usual sources, the RSX, a ref-manual and a demo to show how to use the RSX-library. The archive 'rtc-1.0.tar.gz' includes no RSX, it offers 3 CPM3 console commands that handle time data transfers from the CPM3 system-clock to the RTC and vice vesa. The 3rd program displays the RTC-Time. More in the incl. Ref-Manual.
  
-Filename +⇒ Now inclin the main archive below !
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-[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?media=builderpages:muellerk:zserial-1.0.tar.gz|zserial-1.0.tar.gz]] +
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 ===== Board data ===== ===== Board data =====
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 ===== Documentation ===== ===== Documentation =====
  
-All incl. in the presented archives. So have a closer look into them.+All incl. in the presented archive. So have a closer look into it.
  
 ===== Picture Gallery ===== ===== Picture Gallery =====
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 \\ \\
  
-===== File Lists... =====+===== DOWNLOADS... =====
  
-//**Upload-History:**// +//**Upload-History:**//\\ 
- +//**24.05.2021:**// Some typo-hunting in the system-manual, updated T80 from REV247 to REV350, updated RND-Gen to suppress 0x0000 0xFFFF startup-values//**17.04.2021:**// Collect all archives in one tar.gz archive**NEW:** a expanded system-manual reflecting the now used ZPM3 as the main OSIt's far more configured as in the system18.img that I used as the starting pointAll RSX's are adapted to ZPM3This improves usage within aliases etc. Incl. in the archive is the //zpm3_image18.img//that holds zpm3 along with a cpm3+z3plus drive imageNot included in my archive are all the additional information thta you will find in the original [[builderpages:rhkoolstar:start|mc-2g-1024k]] archive due to keep the size below 128MB !Image S3 to S8 are empty and free for data etc, S9 to S18 are still the Software drives as in system18.img**Finaly:** I will now close this projectI've worked nearly 3 years on it and I can say: the system runs as reliable as all other multicomp systems doI've done lot of software development on it and it never fails (as long as the developed software was bug-free). So have fun with it !
-04.04.2020Uploaded the I2c-RSX together with an updated version of the VHDL code that removes 2 minor bugs +
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-08.04.2020: Uploaded a new I2c-RSX which removes a issue with Ack-Error detection in the I2cWrBuff() function a ret-stack unbalance in I2cRdBuff() too +
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-11.04.2020: Upload of the RTC-Package to support the DS3231 RTC module. +
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-17.04.2020Upload of new Picture1 with now right connection of SDA of DS3231-clock to J1/Pin10 +
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-20.04.2020Upload of new VHDL& zserial-packageAdded read back of BRG for Serial-D Wifi channel +
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-18.05.2020: Upload new zserial package w. added new function 'ChkTTYinp' in C-code & RSX, minor corrections + update of Zserial Ref-Manual +
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-21.05.2020: Upload of iwire-1.0 & rtc-1.0 archive with corrected iwire.rsx. Function 'I2c_CpyBuff' had a bug regarding return on byte-cnt = 0 +
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-06.12.2020: Upload new rtc.tar.gz. Incl. are programs to support new hardware: 1a Uptime-counter2. random-number gen. in hardware. Updated multicomp-july2019 VHDL file incl. the new hardware codeRenamed and updated Port-Addresses pdf to Multicomp-July2019_System-Manual and uploaded it as separate file +
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-10.12.2020New VHDL-File for the FPGA. The .cof-file was gone il and generated a unusable FPGA programming file (CPM freezes after a few seconds…)It took me while to find out who was responsible for that. Beside that the RND-Gen. got some improvements, it tends to freeze the system too fu%%**%% that random shit and its combinational loops… but I want to have it {{[[lib:plugins:ckgedit:ckeditor:plugins:smiley:images:devil_smile.png]]+
  
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