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--- boards:sbc:sbc-386ex [2021/09/17 12:43] – Revision from 2021-09-17
+++ boards:sbc:sbc-386ex [2026/06/15 12:34] (current) – external edit 127.0.0.1
@@ Line 1: / Line 1: @@
+/* Imported from Wayback Machine
+   Original URL : https://retrobrewcomputers.org/doku.php?id=boards:sbc:sbc-386ex
+   Snapshot date: 2025-11-17
+   Generator    : wayback-archiver
+*/
+====== SBC-386EX ======
+Disclaimer: this is a work in progress (still; 30-Nov-2018)
+==== The Processor ====
+The Intel 80386EX processor is a successor to the 80386SX, a stripped down version of the full 80386. The SX uses a 16-bit bus, and is limited to 16Mb of memory. The **EX** processor is targeted at Embedded applications and, like the 80186/188, includes many of the most useful peripherals on-board. It is derived from the **SX** in that it supports a 16-bit bus, but it expands the address space by 2 bits to 64Mb. The on-board peripherals include: 2 interrupt controllers, 2 DMA channels, 2 serial I/O ports, 3 timers, FPU port, a synchronous I/O port, 3 parallel ports, and multiple programmable I/O and chip select pins. Many of these peripherals share chip pins, so a designer has to choose those needed in a particular application.
+{{[[lib:plugins:ckgedit:fckeditor:userfiles:image:boards:sbc:386ex-um-cover.jpg]] Manual]]** (4.6mb)
+==== The Package: PQFP-132 ====
+The “millipede” surface-mount package is a serious deterrent to use in a hobby project. However, a good workaround is an adapter board, as seen below. This is the second version, smaller that the first, measuring 50mm x 50mm. If these can be supplied, a wider range of hobbyists may wish to tackle the final SBC to come out of this project.
+[[https://www.retrobrewcomputers.org/lib/exe/fetch.php?tok=cb311b&media=https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/boards/sbc/img_0941_sm.jpg|{{https://www.retrobrewcomputers.org/lib/plugins/ckgedit/fckeditor/userfiles/image/boards/sbc/img_0941_sm.jpg?640x480|www.retrobrewcomputers.org_lib_plugins_ckgedit_fckeditor_userfiles_image_boards_sbc_img_0941_sm.jpg}}]]
+Two 50mm X 50mm adapter boards with 80386EX in place. The pin connections are on a 2mm grid and are 2×17 pins each.
+==== Project Status ====
+-Nov-30: Full info for the 2.0/2.1 board is posted on the Wiki for those beyond the test & development group.
+-Jul/Aug: BIOS largely complete; but MSDOS manages to go beserk after successfully booting.
+-Feb-18: Final PLD equations get the DRAM operational. A one-wire update to the board is required.
+-Jan/Feb: Rev 2.0 boards are ready. These are good boards with DRAM.
+-Nov-17: A third round of prototype boards have arrived (see above).Theywillusetheadapterboards, and will check out a subset of the circuitry to be used on any final board. There may be additional “prototype” rounds to check out other circuitry, before committing to a fully functional SBC.
+-Nov-20: Board running @ 20Mhz (40Mhz osc.) and passing memory test. I switched from a 64KB (28 pins) flash to 128KB flash (32 pins) to avoid positioning errors when strapped for Vcc on pin 30(28). The SST 128KB flash erases and programs faster, too.
+-Jan-09: Three boards are running now at 25Mhz and 33Mhz. Speed limitation is the FPU, since Intel FPU's only go up to 25. Cyrix FPU runs at 33Mhz, but requires a board mod to handle the READY# line with a 74LS241. The prototype board has served well as a learning experience with this high-integration CPU chip.
+–JRCoffman (johninsd at gmail dot com)